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hagiwara-yoshiaki@aiplab.com ( http://www.aiplab.com/ )

hagiwara@ssis.or.jp ( http://www.ssis.or.jp/en/index.html )

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My Work Summary

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I was teaching graduate and undergraduate students at Sojo university
as a full professor of the information science department since 2009
till 2017. During the period I taught the various courses such as
Engineering Mathematics, Numerical Computational Method,
Semiconductor Device Physics, Digital Circuit and System Design
and Artificial Intelligent Robotics.

I wrote a book entitled as “The world of Digital Circuits” for
the Intelligent Partner System (AIPS) applications in 2016 which
summarizes the most of the scopes of my class teaching materials
focused to the physics of semiconductor and LSI chip designs.

My most important contribution to the world is that my inventions
and my development efforts helped and accelerated the world to
change from the analog to the digital world by replacing the film
and the mechanical shutter technologies by the all solid semiconductor
silicon chips in the field of the intelligent image sensor technology.

Specifically, my 1975 invention of three layer device of pnp dynamic
photo transistor structure, when the two layer photodiode of pn structure
was common at that time, was very unique and is a new dimensional
device for future 3DIC multi-chip integration for artificial intelligent
partner systems with a great deal of freedom for improving image
sensor performances, including super light sensitivity, the most
important characteristics of the image sensor device now used all
over the world.

This is the base of today’s photodiode called PPD or Pinned Photodiode,
which is widely used for various applications including smartphones,
robotics, and self-driving cars to name a few. Sony commercialized
image sensor devices based on his invention, with the trade name
of HAD (Hole Accumulation Diode) sensor, and has become a leading
manufacturer of digital cameras which replaced film cameras completely
in the world.

My 1975 inventions of the back light illumination mode pnp dynamic
photo transistor with in-pixel buffer memory MOS buffer memory
in the global shutter operation mode, is now very essential for
the modern CMOS image sensor applications.

Image sensors, now used for taking fast action pictures, are completely
free from mechanical parts because of my 1975 invention of the electrical
shutter operational four layer device of pnpn dynamic photo thyristor
which has a vertical overflow drain (VOD) structure.

I served many years as an operational committee member, the ISSCC Asian
Program committee chair and the international program chair of IEEE Solid
State Circuit Society sponsored ISSCC conferences in series.

I was also invited as a special guest speaker in CCD1979, ESSCIRC2001,
ESSCIRC2008 and ISSCC2013 for his contributions to the solid state circuits
technology needed to change the image sensor world from the analog
to digital one.

I also served many years as an operational committee member and the conference
chair in the IEEE Electron Device Society sponsored ICMTS conferences in series.

I served as a technical committee member for many years in the international 
standardization committee (IEC) and served as the IEC TC47 technical committee
chair in 1992 in the field of the digital memory chips standardization activities in IEC.

I am a distinguished alumni of California Institute of Technology and IEEE Life fellow.










The first Image Lag free FT CCD image sensor

with the PNP junction type Pinned Photodiode was

reported at SSDM1978 by Yoshiaki Hagiwara at Sony.



The first Image Lag free ILT CCD image sensor

with the PNPN junction type Pinned Photodiode

and the VOD electrical shutter function was

reported in the Journal of Nikkei Microdevices,

October 1987 Issue by Masao Hamazaki at Sony.




NEC IEDM1982 paper reported the image lag data.

The image lag is due to the RC delay of
the floating surface P+ layer ?

The details are explained below :

http://www.aiplab.com/Pinned_Photodiode_must_have_a_heavy_doped_Channel_Stops.pdf


<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
Summary of Achievements .
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
Hagiwara proposed three layer device of pnp dynamic photo
transistor structure in 1975, when the two layer photodiode of pn
structure was common. This device is very unique and a new
dimensional device with a great deal of freedom for improving the
performance of image sensors used all over the world, including
the super light sensitivity feature, the most important characteristics
of the image sensor device. This is the base of today’s photodiode
called PPD or Pinned Photodiode, which is widely used for various
applications including smartphones, robotics, and self-driving cars
to name a few. Sony commercialized image sensor devices based
on his invention, with the trade name of HAD Sensor (HAD for Hole
Accumulation Diode), and has become a leading manufacturer of
image sensors in the world.
>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>


Please evaluate and judge my early works at SONY.


Related documents are uploaded from the following sites.

https://www.shmj.or.jp/english/pdf/dis/exhibi1005E.pdf


(1) My basic 1975 Japanese Patents of Pinned Photodiode

Japanese Patent 1975-127646 on N+NP+NP junction Pinned Photodiode
http://www.aiplab.com/JP1975-127646_A.jpg
http://www.aiplab.com/JP1975-127646.pdf

Japanese Patent 1975-127647 on N+NP+N junction Pinned Photodiode
http://www.aiplab.com/JP1975-127647_A.jpg
http://www.aiplab.com/JP1975-127647.pdf

Japanese Patent 1975-124985 on P+NPNsub junction Pinned Photodiode
http://www.aiplab.com/image7.jpg
http://www.aiplab.com/JP1975-134985.pdf


(2) My SSDM1978 paper on PNP junction Pinned Photodiode

http://www.aiplab.com/SSDM1978_A_Pinned_Photodiode.jpg

"A 380H x 488V CCD Imager with Narrow Channel Transfer Gates"
Proceeding of the 10th Conference on Solid State Devices, Tokyo 1978;
Japanese Journal of Applied Physics, Vol 18 (1979) Supplement 18-1,pp.335-340
Japanese Patent 1975-127647 on N+NP+N junction Pinned Photodiode

http://www.aiplab.com/P1978_Pinned_Photodiode_1978_Paper_by_Hagiwara.pdf

(3) My 3DIC2019 conference paper on 3D integration of Back Light illuminated Pinned Photodiode.

http://www.aiplab.com/image14.jpg

"Multichip CMOS Image Sensor Structure for Flash Image Acquisition"
IEEE International 3D Systems Integration Conference 2019 (3DIC2019)
Digest of Technical Papers, Sendai, Japan, Paper4017, October 2019

http://www.aiplab.com/P2019_3DIC2019Paper_on_3D_Pinned_Photodiode.pdf


(4) My EDTM2020 conference paper on P+PNP junction type Pined Photodiode.

"Simulation and Device Characterization of the P+PN+P Junction Type
Pinned Photodiode and Schottky Barrier Photodiode"

http://www.aiplab.com/P2020_EDTM2020_PaperID_3C4_by_Hagiwara.pdf


I really need your helps with the very good semiconductor device physics background
to evaluate my early works with the competent and fair judgment eyes.

I also spoke in the following conferences.


http://www.aiplab.com/P1979_CCD79_in_Edinbourgh_1979.pdf

http://www.aiplab.com/P2001_ESSCIRC2001.pdf

http://www.aiplab.com/P2008_ESSCIRC2008Hagiwara.pdf

http://www.aiplab.com/P2013_ISSCC2013PanelTalk.pdf


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http://www.aiplab.com/index1_List_of_Books_and_Journal_Publication.html

http://www.aiplab.com/index2_Conference_Publication.html

http://www.aiplab.com/index3_International_Contributions_and_Awards.html

http://www.aiplab.com/index4_Important_Japanese_Patents.html

http://www.aiplab.com/index5_My_Work_Summary.html


http://www.aiplab.com/index6_Important_Publication_and_Patent_Works.html

*********************************************************


*********************************************************

hagiwara-yoshiaki@aiplab.com ( http://www.aiplab.com/ )

hagiwara@ssis.or.jp ( http://www.ssis.or.jp/en/index.html )

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           return to the TOP Page
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